In the manufacturing process of semiconductor devices, metal layers may be deposited on workpieces or substrates like semiconductor wafers. These metal layers may then be structured to form for example interconnects, bonding pads, heat sinks or the like. Conventionally deposited metal layers, for example copper layers, may cause stress to a substrate, which may be undesirable in some circumstances. Similar problems may occur when depositing metal layers on other kind of substrates in other processes than semiconductor device manufacturing processes.
In recent years, the use of porous metal layers has been investigated. Porous metal layers may for example be formed (e.g. deposited) by plasma-based deposition methods or other methods, e.g. spray coating methods or printing methods (e.g., ink jet printing, stencil printing, or the like), and may exhibit varying porosity depending for example on the conditions during formation (e.g. deposition) of the metal layer. Porosity in this respect may refer to the percentage of the metal layer being occupied by voids (“pores”), a high porosity layer having a higher percentage of its volume occupied by such voids than a layer with a lower porosity. Such porous metal layers may in some cases have favorable properties, for example in terms of stress induced. However, integration of such porous metal layers in manufacturing processes, e.g., of silicon-based devices constitutes an obstacle to be solved, in particular the structuring of such layers.
Structuring of thick, porous metal layers, e.g. deposited with a plasma-based deposition method such as e.g. a plasma dust deposition process, may be difficult with common methods. Due to this problem the range of applications, e.g. in semiconductor industries or solar industries, for porous films may be limited.